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rev: 102108 ds33m30 demo kit general description the ds33m30 demo kit (dk) is an easy-to-use evaluation board for the ds33m30 ethernet-over- sonet/sdh devices. maxims chipview software is provided with the demo kit, giving point-and-click access to configuration and status registers from a windows ? -based _ pc. on-board leds indicate receive loss-of-signal, queue overflow, ethernet link, tx/rx, and interrupt status. windows is a registered trademark of microsoft corp. demo kit contents DS33M30DK board cd including: chipview software ds33m30 definition files DS33M30DK data sheet ds33m30 data sheet features ? demonstrates key functions of ds33m30 ethernet transport chipset ? includes ethernet phy supporting gigabit mode ? includes optical sfp module for sonet/sdh interface ? network connectors, transformers, and termination ease connectivity ? careful layout provides signal integrity ? on-board processor and chipview software provide point-and-click access to the ds33m30 register set ? all system side and overhead pins are easily accessible for external data source/sink ? easy-to-read silkscreen labels identify the signals associated with all connectors, jumpers, and leds ordering information part type DS33M30DK demo kit for ds33m30 ________________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. downloaded from: http:///
_________________________________________________________________________________________________ DS33M30DK rev: 102108 2 of 28 table of contents 1. board floorplan ..................................................................................................................... 3 2. pcb errata .................................................................................................................................. 3 3. file locations ............................................................................................................................ 4 4. basic operation ................................................................................................................ ........ 4 4.1 p owering u p the d emo k it .......................................................................................................... 4 4.1.1 general ........................................................................................................................ .......................... 4 4.2 b asic ds33m30 i nitialization ...................................................................................................... 4 4.2.1 additional configur ation for ds33m30........................................................................................... ........ 5 4.3 m onitor and c apture e thernet t raffic ................................................................................... 5 5. jumpers and co nnectors ..................................................................................................... 5 6. line-side connections .......................................................................................................... .. 7 7. microcontroller ..................................................................................................................... 7 8. power-supply connectors .................................................................................................. 7 9. connecting to a computer .................................................................................................. 7 10. installing and running the software ............................................................................ 8 11. address map .................................................................................................................... ........... 9 12. additional information/resources.................................................................................. 9 12.1 ds33m30 i nformation .............................................................................................................. 9 12.2 DS33M30DK i nformation ......................................................................................................... 9 12.3 t echnical s upport ................................................................................................................... 9 13. component list................................................................................................................. ....... 10 14. schematics ..................................................................................................................... ........... 14 list of figures figure 1-1. DS33M30DK board floorplan.......................................................................................... ......................... 3 figure 14-1. ds33m30 pcb layout and schematic hierar chy block page listing.................................................. 14 list of tables table 3-1. definition and configurati on files .................................................................................. ............................ 4 table 5-1. jumper s and conne ctors .............................................................................................. ............................. 5 table 11-1. a ddress map ........................................................................................................ .................................... 9 downloaded from: http:///
_________________________________________________________________________________________________ DS33M30DK rev: 102108 3 of 28 1. board floorplan figure 1-1. DS33M30DK board floorplan 2. pcb errata DS33M30DK02a0 errata: ? silkscreen for jp08 should designate the jumper functi on as mac clock enable. instead it designates the function as mdix enable ? silkscreen for jp09 should designate the jumper function as mdix enable. instead it designates the function as mac clock enable. ? sram devices u06 and ub09 have been reworked to connect pin 1 and pin 2. on the pcb this appears as a solder bridge between pin 1 and pin 2. this has been done to allow either a 128k*8 or a 512k*8 sdram to be installed and used as a 128k*8 device. microprocessor sfp leds serial port (57600-8-n-1) clocks and clock selection usb driver configuration power (5v) ethernet phy and connector sonet optical sfp spi config jumpers ethernet configuration jumpers ds33m30 ddr comm select jumpers downloaded from: http:///
_________________________________________________________________________________________________ DS33M30DK rev: 102108 4 of 28 3. file locations this demo kit relies upon several supporting files, which ar e provided on the cd and are available as a zip file from the maxim website www.maxim-ic.com/DS33M30DK . all locations are given relative to the directory in the cd/zip file called _def_ini_ds33m30. table 3-1. definition a nd configuration files file name file usage . \ _ds33m_globalsonet.def top level definition file to select in chipviews register mode. this file will autoload the remaining definition files for the ds33m30 when parallel mode is used. .\ds33m_bufferman.def .\ds33m_encapdecap.def .\ds33m_globaleth.def .\ds33m_group.def .\ds33m_lansubscriber.def .\ds33m_serial_1234.def ds33m30 dependent files. these are called by _ds33m_globalsonet.def file, which is listed above. .\m30_rx_tx_simulation 19mhz.mfg .\m30_sts3c_bert_looptime.mfg .\m30_sts3c_sonet_loopback.mfg .\_m30_sts3c_ethernet_loopback.mfg .\_m30_sts3c_gfpnull_noscramble.mfg files for manually configuring the ds33m30. 4. basic operation note: in the following sections, software-related items are identified by bolding. text in bold refers to items directly from the ev kit software. text in bold and underlined refers to items from the windows operating system. 4.1 powering up the demo kit ? connect pcb power jack to the wall adapter. ? connect rs-232 serial cable, or usb cable between the host pc and demo kit. ? verify that the jumpers are configured as described in table 5-1 . 4.1.1 general ? upon power-up the power leds (ds13, ds12, ds14 green) will be lit. ? phy link led should be lit if an ethernet cable is c onnected. note that there ar e three link leds, as the ds33m30 is a gigabit mode device. the l1000 led s hould be litl the l100 and l10 leds should not be lit. following are several basic system initializations. 4.2 basic ds33m30 initialization this section covers two basic methods for configuring the ds33m30. 1. device driver-based configurat ion: (note: the ds33m3001a0 board re vision does not come loaded with device drivers.) if the pins j20.1+j20.2 are jumpered, the device driver autoconfigures the ds33m30 upon power-up. this enables traffic to pass from the ethernet port to the serial port. consult the device driver documentation for further details. to load the gui inte rface for the device drivers, go to the chipview register mode tools menu and select tools plugins ds33m30/m33 device driver demo . 2. register-based configuration: eos vc 3 with two ports assigned to vcg1. a. remove jumper j20.1+j20.2 to dis able device drivers and reset the board. b. launch chipview.exe and select register view . downloaded from: http:///
_________________________________________________________________________________________________ DS33M30DK rev: 102108 5 of 28 c. when prompted for a definition file, pick the file named _ds33m30_globalmicroport.def . several additional definition files will load. d. go to the file menu and select file memory config file load .mfg file . when prompted, select the file named _m30_sts3c_gfpnull_noscramble.mfg . 4.2.1 additional conf iguration for ds33m30 ? using either a patch or crossover cable, connect the et hernet connector to an ordinary pc or network test equipment. this should cause the link led to turn on. ? place a loopback connector at the sonet network side; the optical los leds should go out. ? at this point any packets sent to the ds33m30 ar e echoed back. incoming packets (i.e., ping) should cause the activity led to blink. ? note that chipview.exe display settings can be changed using the options settings menu. 4.3 monitor and capture ethernet traffic ? although ping is mentioned, it is not the recommended frame source for testing. the ping command goes through the computers tcpip stack and sometimes is not sent out the pcs network connector (i.e., if the pcs arp cache is out of date). additionally, ping requires two pcs, as a windows pc with only one adapter cannot ping itself (i.e., a local ping gets sent to local host instead of out the connector). with that said, ping is still a valuable test once the prototyping stage is complete. ? generation and capture of arbitrary (r aw) packets can be accomplished using commview . a full-featured demo is available at www.ta mos.com/products/commview. ? wireshark (formerly ethereal) is a free packet captur e utility. download is availa ble at www.wireshark.org. ? adding additional ethernet ports to a pc is rather si mple when a usb-to-ethernet adapter is used. this allows for end-to-end testing using a single pc. w hen using two adapters, the pc has a different ip address for each adapter. test equipment allows select ion of either adapter. operating system-based network traffic is sent out the def ault adapter, which usually is the adapt er that has recently had connection to a live network. 5. jumpers and connectors jumpers and connectors are listed in table 5-1 . they are listed in order of appearance on the pcb from left to right, top to bottom (as viewed with sonet connector on the left side of the board). table 5-1. jumper s and connectors silkscreen reference function basic setting schematic page description j03 ethernet connection connected 14 connect to gigabit ethernet source. jp06 + jp03 bias phy speed1 + speed0 jumper p2+3(high) p2+1 (low) 14 if auto negotiation is enabled this setting advertises capability for 1000 speeds. if auto negotiation is disabled then this setting forces 1000mb mode. jp04 bias phy anen jumper p2+3 (high) 14 jumper p2+3 to enable auto negotiation. jp05 bias phy duplex jumper p2+3 (high) 14 jumper p2+3 to enable full duplex, jumper p1.2 to force half duplex. jp09 bias phy mdixen jumper p2+1 (high) 14 p2+3 disables pair swap mode, p2+1 enables pair swap mode. jp08 bias phy macclken jumper p2+3 (low) 14 p2+3 phy clock to mac output is disabled, p1+2 phy clock to mac output is enabled. mac clock only needs to be enabled in gigabit mode. downloaded from: http:///
_________________________________________________________________________________________________ DS33M30DK rev: 102108 6 of 28 silkscreen reference function basic setting schematic page description ds05 led activity -- 14 flashes for phy tx-rx activity. ds06 ds07 ds09 led link speed ds06 shold be lit (when linked) 14 led to indicate link speed: 1000, 100, or 10mbps. only ds06 should be lit since the ds33m30 is gmii only. j04 phy test points -- 12 phy test points. the connector pinout is compatible with existing phy cards, but cannot be used with u04 on the board. jp13 jp14 runtime options na 11 currently the device drivers do not fit in flash, and are not loaded to the dk. ds11 status 11 led kit status, not lit. j03 usb 11 usb interface. see folder marked usbdrivers_cp210x for drivers. j04 rs232 db9 connector 11 rs-232 db-9 connector, operates in ascii mode at 57.6k,8,n,1. jp18 jp19 comm port jumper p1+2 p1+2 11 jumper pins 1+2 to select the rs232 transceiver. jumper pins 2+3 to select the usb to serial converter. sw01 reset 7 system reset button. j06 spi all jumpered 6 spi? bias and data pins. control by external processor is possible after removing cs, miso, mosi, and sck jp15 hiz jumper p2+3 6 dut three-state control. j07 software debug 11 once ebdi. jp07 clock select jumper p2+1 4 clock selection for phy and ethernet side of ds33m30. jp02 clock select jumper p1+2 4 clad clock selection, jumper p1+2 to drive with 19.44mhz. jumper p2+3 to drive with 77.76mhz clock. ds08 ds33m30 int 9 led, lit when ds33m30 interrupt is asserted. j01 sfp test points jumper p9+10 test points for sfp module. ds01 sfp mod0 2 lit when a sfp module is installed. ds03 sfp txdisable 2 lit when tx is enabled. ds02 sfp los 2 lit when fiber optic cable is removed. j02 jp01 sfp los/m33 los jumper 2 jumper j02 to connect sfp los to ds33m30 los. if j02 is removed, then jp01 can be used to pull ds33m30 los high or low. u01 sfp installed 2 sfp module. j05 jtag 6 ds33m30 jtag. spi is a trademark of motorola, inc. downloaded from: http:///
___________________________________________________ ______________________________________________ ds3 3 m 3 0 dk rev: 102108 7 of 28 6 . line -side conne c t ions the DS33M30DK has one optical port and one ethernet port. 7 . m ic roc ont rolle r the microcontroller has factory-installed firmware in on-c hip nonvolatile memory. this firmware translates memory access requests from the rs-232 serial port into register accesses on the ds33m30 and the fpgas. 8 . pow e r-supply conne c t ors connect a 5.0v wall adapter to the pcb power jack. led ds1 provides indications that a 5.0v supply is connected properly. the board power supplies (3.3v, 2.5v, and 1.8v ) are regulated to supply proper voltages to various circuits on the board. 9 . conne c t ing t o a com put e r both usb and serial modes are supported. to connect through a rs-232 serial port, set jumpers jp25 and jp26 jumpers to pins 1+2, identified in the silkscreen as rs232,processo r. connect a sta ndard db-9 serial cable betwe en the serial port on the DS33M30DK and an available serial port on the host com puter. the host computer must be a windows-based pc. be sure the cable is a standard straight-through cable ra ther than a null-modem cable. null-modem cables prevent proper operation. to connect through usb, set jumpers jp25 and jp26 jumpers to pins 3+2, identified in the silkscreen as usb, processor. connect a usb cable betw een the DS33M30DK usb connector and the pc. the host computer must be a windows-based pc, which should automatically re cognize the device as a virt ual com port and assign the device drivers. if drivers are not automatically assigned, direct the new hardware wizard to the driver files on the cd in the folder marked usbdrivers_cp210x . downloaded from: http:///
_________________________________________________________________________________________________ DS33M30DK rev: 102108 8 of 28 10. installing and running the software chipview is a general-purpose program that supports a number of maxim demo kits. to install the chipview software, run chipview.msi from the disk included in t he DS33M30DK box or from the zip file downloadable on our website at www.maxim-ic.com/DS33M30DK . after installation, run the chipview program with the DS33M30DK board powered up and connected to the pc. if the default installation options were used, one easy way to run chipview is to click the start button on the windows toolbar and select programs chipview chipview . in the opening screen, click the register view button. select the correct serial port in the port selection dialog box, then click ok . next, the definition file assignment window appears. this window has subwindows to select definition files for up to four separate boards on other maxim evaluation platforms. in the active subwindow, select the _ds33m_globalsonet.def definition file from the list shown, or browse to find it in another directory. press the continue button. after selecting the definition file, the main part of the chipview window displays the ds33m30s register map. to select a register, click on it in the register map. when a r egister is selected, the full name of the register and its bit map are displayed at the bottom of the chipview window. bits that are logic 0 are displayed in white, while bits that are logic 1 are displayed in green. the chipview software supports the following actions: ? toggle a bit. select the register in the register m ap and then click the bit in the bit map. ? write a register. select the register, click the write button, and enter the value to be written. ? write all registers. click the write all button and enter the value to be written. ? read a register. select the register in the register map and click the read button. ? read all registers. click the read all button. downloaded from: http:///
_________________________________________________________________________________________________ DS33M30DK rev: 102108 9 of 28 11. address map spi mode address space begins at 0x0. table 11-1. address map offset device description 0x0000 ds33m30 ds33m30 registers 12. additional information/resources 12.1 ds33m30 information for more information about the ds33m30, refer to the ds33m30 data sheet at www.maxim-ic.com/ds33m30 . 12.2 DS33M30DK information for more information about the DS33M30DK, refer to the DS33M30DK quick view page at www.maxim-ic.com/DS33M30DK . 12.3 technical support for additional technical support, submit your questions at www.maxim-ic.com/support . downloaded from: http:///
_________________________________________________________________________________________________ DS33M30DK rev: 102108 10 of 28 13. component list designation description supplier part c01, c03, c05, c06, c09, c11, cb11, cb12, cb15, cb16, cb17, cb19, cb20, cb24, cb39, cb44, cb45, cb48, cb56, cb57, cb60, cb66, cb71, cb74, cb75, cb88, cb97, cb101, cb112 l_0603 ceram .1uf 16v 20% x7r avx 0603yc104mat component listing on next line, begins with c02 0603 ceram 4.7uf 6.3v multilayer digi-key ecj-1vb0j475m c02, c04, c07, cb05, cb07, cb18, cb21, cb22, cb25, cb31, cb32, cb 33, cb35, cb38, cb42, cb43, cb46, cb47, cb49, cb50, cb51, cb53, cb55, cb61, cb62, cb63, cb64, cb67, cb68, cb70, cb72, cb73, cb76, cb77, cb78, cb79, cb80, cb81, cb83, cb84, cb86 , cb89, cb90, cb94, cb95 , cb103, cb105, cb109, cb110, cb116, cb121 c08, c10, c12, cb04, cb08, cb09, cb10, cb14, cb30, cb40, cb65, cb85, cb107 l_0603 ceram .01uf 50v 10% x7r avx 06035c103kat c1, c13, c14, c15, c16, c17, c18, cb120 , cb23, cb27, cb28, cb29, cb41, cb87, cb98, cb106 1206 ceram 10uf 10v 20% panasonic ecj-3yb1a106m cb01, cb02, cb03, cb13, cb111 d case tant 470uf 6.3v 20% kem t491d477m006as cb06, cb26, cb34, cb36, cb37, cb52, cb54, cb58, cb59, cb69, cb82, cb91, cb92, cb93, cb96, cb102, cb108, cb114, cb115 0603 ceram .1uf 16v 10% panasonic ecj-1vb1c104k cb104, cb117 l_1206 ceram 1uf 16v 10% panasonic ecj-3yb1c105k cb113 1206 ceram 4.7uf 25v 10% x5r panasonic ecj-3yb1e475k cb99, cb100, cb118, cb119 l_d case tant 68uf 16v 20% panasonic ecs-t1cd686r db01 schottky diode, 1 amp 40 volt internatioanl rectifier 10bq040 ds01, ds03, ds11 , ds04, ds12, ds14 l_led, green, smd panasonic ln1351c ds02, ds08, ds10 l_led, re d, smd panasonic ln1251c ds05, ds06, ds07, ds09 led, green/green, smd lumex 67-1362-1-nd ds13 led, red/green, sm d liteon 160-1172-1-nd gnd_tp01, gnd_tp02, gnd_tp03, gnd_tp04, gnd_tp05, gnd_tp06, gnd_tpb01, gnd_tpb02, gnd_tpb03 standard ground clip keystone 4954 h01, h02, h03, h04, h05, h08 kit, 4-40 hardware, .50 nylon standoff and nylon hex-nut labstock 4-40kit4 j01 terminal strip, 10 pin, dual row, vert digi-key s2012-05-nd j02, jb01 100 mil 2 pos jumper labstock na j03 connector, single level, gigabit rj-45, 10 pin halo electronics hfj11-1g02e downloaded from: http:///
_________________________________________________________________________________________________ DS33M30DK rev: 102108 11 of 28 j04 plug, smd, 50 pin, 2 row vertical samtec sfm-125-l2-s-d-lc j05 l_terminal strip, 10 pin, dual row, vert samtec tsw-105-07-t-d j06 header, 14 pin, dual row, vert samtec hdr-tsw-107-14-t- d j07 100 mil 2*7 pos jumper labstock na j08 l_conn, db9 ra, long case amp 747459-1 j09 type b single rt angle, black digi-key wm17108-nd jb02 conn 2.1mm/5.5mm pwrjack rt angle pcb, closed frame, high current 24vdc@5a also requires 5v acdc adapter input 100-240vac 50- 60hz 0.6a output dc 5v 2.6a. pn dms050260- p5p-sz. model 3z- 161wp05 cui, inc pj-002ah jp01, jp02, jp03, jp04, jp05, jp06, jp07, jp08, jp09, jp13, jp14, jp15, jp18, jp19 100 mil 3 pos jumper labstock na l01, l02 1uh 10% 0805 multilayer ceramic 400 ma tdk glf2012t1r0m l1 ferrite 3a 100 ohm at 100 mhz 1206 smd steward hi1206n101r-10 r01, r03, r04, rb19 res 0603 0.0 ohm 1/16w 5% panasonic erj-3gey0r00v r02 res 0603 1.0m ohm 1/16w 5% panasonic erj-3geyj105v rb01, rb18 , rb03, rb20, rb22 res 0603 330 ohm 1/16w 5% panasonic erj-3geyj331v rb02, rb04, rb12, rb13, rb14 res 0603 30 ohm 1/16w 5% panasonic erj-3geyj300v rb05 res 0603 2.2k ohm 1/16w 5% panasonic erj-3geyj222v rb06, rb07, rb16 res 0603 2.0k ohm 1/16w 5% panasonic erj-3geyj202v rb08 res 0603 100 ohm 1/16w 1% panasonic erj-3ekf1000v rb09, rb11 res 0603 1.00k ohm 1/16w 1% panasonic erj-3ekf1001v rb15 res 0603 9.76k ohm 1/16w 1% panasonic erj-3ekf9761v rb17, rb21 l_res 0603 10k ohm 1/16w 5% panasonic erj-3geyj103v rp01, rp02, rp03, rp04, rp05, rp06, rp07, rp08, rpb12 resistor, 4 pack, 30 ohm 5pct quad 0603 panasonic exb-v8v300jx rpb01, rpb07, rpb20, rpb24 resistor, 4 pack, 330 ohm 5pct quad 0603 panasonic exb-v8v331jx downloaded from: http:///
_________________________________________________________________________________________________ DS33M30DK rev: 102108 12 of 28 rpb02, rpb08, rpb11, rpb17, rpb19 resistor, 4 pack, 1k ohm 5pct quad 0603 panasonic exb-v8v102jx rpb03, rpb04, rpb13, rpb15, rpb18, rpb21, rpb22, rpb23, rpb25, rpb26, rpb27, rpb28, rpb29 resistor, 4 pack, 10k ohm 5pct quad 0603 panasonic exb-v8v103jx rpb05, rpb06, rpb14 resistor, 4 pack, 2.2k ohm 5pct quad 0603 panasonic exb-v8v222jx rpb09, rpb10 resistor, 4 pack, 50 ohm 2pct quad 0603 koa cn1j4ttd500g sw01 switch mom 4pin single pole panasonic evqpae04m tp01 test point, 1 plated hole, do not stuff labstock na u01 sfp host / receptacle parts_kit sfp_host-tyco u02 gig phyter v, 10/100/1000 ethernet physical layer, 128 pin qfp national semiconductor dp83865dvh u03 ethernet extension device dallas semiconductor ds33m30 u04 double data rate (ddr) sdram 2-2-2 timing 256mbitx16 tssop micron mt46v16m16tg-75e u05 mmc2107 processor motorola mmc2107 u06, ub09 cypress sram, lab stock labstock na u07 ic, single-chip usb to uart bridge, 28 pin qfn sil cp2101 u1 spi serial eeprom 8m 8 pin soic 3.3v atmel at26df081a ub01 ic, linear reg 1.5w, 2.5v or adj, 1a, 16tssop- ep maxim max1793eue-25 ub02 ic, linear reg 1.5w, 1.8v or adj, 1a, 16tssop- ep maxim max1793eue-18 ub03 microprocessor voltage monitor, 3.08v reset, 4pin sot143 maxim max811teus-t ub04, ub05, ub07 ic, linear reg 1.5w, 3.3v or adj, 1a, 16tssop- ep maxim max1793eue-33 ub06 high speed buffer fairchild nc7sz86 ub08 dual rs-232 transceivers with 3.3v/5v internal capacitors maxim max3233e xb01 xtal low profile 8.0mhz ecl ec1-8.000m yb01 oscillator, crystal clock, 3.3v - 19.44 mhz saronix socket+nth089a3- 19.44 downloaded from: http:///
_________________________________________________________________________________________________ DS33M30DK rev: 102108 13 of 28 yb02 socketed oscillator, crystal clock, 3.3v - 25.000 mhz saronix nth089aa3- 25.000+socket yb03 oscillator, crystal clock, 3.3v - 77.76 mhz saronix socket+nth089a3- 77.7600 downloaded from: http:///
_________________________________________________________________________________________________ DS33M30DK rev: 102108 14 of 28 maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the ci rcuitry and specifications wi thout notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2008 maxim integrated products 14. schematics the DS33M30DK schematics are featured in the following pages. the schematic contains three hierarchal blocks: microcontroller, ethernet phy, and ethernet test points. all signals inside a hierarchy block are local, with exception for v cc and ground. in-port and out-port connectors are used to allow signals inside a hierarchy block to become accessible as pins on the hierarchy blocks symbol. from here blocks are wired together as if they were ordinary components. figure 14-1 shows the system diagram in terms of hierarchal blocks with schematic page numbers given for each functional block. figure 14-1. ds33m30 pcb layout and schem atic hierarchy block page listing p block page 1 symbol schematic pages 9-11 ds33m30 schematic pages 1-8 power supply schematic pages 7-8 ethernet phy page 4 symbol schematic pages 3-4, 12, 13-15 sonet sfp page 2 ddr page 5 clocks and configuration pages 4,6 is a registered trademark of maxim integrated products. downloaded from: http:///
beginning of DS33M30DK DS33M30DK contents / index cr-1 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page1 oscillators. p.4 ddr memory. p.5 microport. p.1,9-11 steve scully microport. p.1,9-11 03/10/2008 DS33M30DK02a0 bias+config. p.6 1/14(total) 1/8(block) power. p.7-8 serdes. p.2 ethernet. p.3-4,12,13-15 block name: _rc_top_dn_. spi_miso spi_sck m30_int dut_jtrst_n reset_sys phy_int spi_mosi dut_mt3 rpb15 rpb13 u03 dut_jtdi dut_test_en dut_mt0 dut_mt1 dut_mt4 m30_cs m30_int d5_spi_swap d7_spi_cpol d6_spi_cpha dut_test_en dut_mt4 dut_mt3 dut_mt0 dut_mt1 10k 10k dut_jtdo dut_hiz_n reset_sys d2_spi_clk d1_spi_mosi d0_spi_miso dut_cladclk dut_jtms dut_jtclk spi_ss l12 j8 l1 k6 k7 j5 h7 m1 j11 j2 m12 j4 j9 h4 h9 k4 k9 k5 k8 h1 d12 j7 d2 j6 h5 h8 g1 h6 f2 e1 h2 g2 f1 a1 c2 h3 g3 d11 c1 d1 b1 k11 l11 m11 g10 h11 k10 j10 h10 4 8 7 65 2 1 3 4 8 7 65 2 1 3 6d3 6d3 6a7 6a8 9b7v 6d3 9b6v 6d3 9b7v 7b3 1b1 4b4 9b6v 1b1 6c7 9a7v 4b4 9b6v 6a5 6a8 1b4 6a7 1b1 1b4 1b4 1b4 6d2 1b8 6c7 9a7v 6d2 6d2 6d2 1b7 1c7 1c7 1c7 1c7 6c7 7b3 1a8 4b4 9b6v 6d2 6d2 6d2 4c6 6a7 6a8 6a7 6a8 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 v3_3 ds33m30 cs* sdo sclk sdi int* spiswap cpol cpha hiz* test* rst* refclk mt4 mt3 mt0 mt1 jtrst* jtms jtclk jtdi jtdo vss cvss2 vss vss vss vss vss vss cvdd2_1.8v vdd_1.8v vdd_1.8v vdd_1.8v vdd_1.8v vdd_1.8v vdd_1.8v vdd_1.8v vdd_1.8v vdd_3.3v vdd_3.3v vdd_3.3v vdd_3.3v vss vss vss vss vss vss vss v3_3 v1_8 _motprocrescard_dn hierarchy block microprocessor int3 reset_in a_dut_<12..0> int4 cs_x3 cs_x4 cs_x5 rd_dut wr_dut d_dut<7..0> int5 int2 cs_x2 cs_x1 spi_cs spi_sck spi_mosi spi_miso misc_io<8..1> misc_io<9> misc_io<10> misc_io<11> misc_io<12> downloaded from: http:///
pullups for open drain pins serves as device detect mod0 is grounded in the sfp .1uf 4.7uf 1uh 4.7uf 4.7uf .1uf 1uh 330 100 green green red 1k 10k 10k jmp_3 jmp_2 sfp_i2c_sda sfp_dev_detect sfp_i2c_clk sfp_i2c_sda sfp_rate sfp_txdisable sfp_dev_detect sfp_los sfp_vcct sfp_vccr sfp_tx_fault sfp_txdisable sfp_mod2 sfp_mod0 sfp_mod1 sfp_rate sfp_los sfp_vccr sfp_vcct dut_sfp_rdp sfp_mod0 dut_los dut_sfp_rdn dut_sfp_tdn dut_sfp_tdp sfp_mod0 sfp_mod2 sfp_tx_fault sfp_mod1 sfp_los sfp_rate sfp_los dut_los cb19 cb21 j01 l02 cb18 cb22 cb15 l01 u01 rpb01 rb08 ds01 ds03 ds02 u03 rpb02 rpb04 rpb03 jp01 j02 sfp_tx_fault sfp_i2c_clk sfp_los sfp_txdisable 03/10/2008 DS33M30DK02a0 steve scully 2/14(total) 2/8(block) cr-2 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page2 serdes. p.2 block name: _rc_top_dn_. 1 2 3 46 5 7 89 10 19 20 17 18 14 15 16 13 12 11 29 31 30 28 27 26 25 24 23 22 21 4 8 7 65 2 1 3 1 2 1 2 1 2 h12 g12 e11 g11 f12 k12 j12 f10 f11 e12 4 8 7 65 2 1 3 4 8 7 65 2 1 3 4 8 7 65 2 1 3 1 3 2 2 1 6 5 4 9 7 3 10 8 1 2 2a3 2a3 2a3 2c2 2b2 2a6 2c2 2a5 2b2 2a6 2c2 2b1 2b2 2a8 2a6 2a5 2b5 2b5 2a6 2a3 2a5 2a3 2a6 2a6 2a5 2a6 2a6 2a1 2a8 2a6 2a5 2a1 2d3 2d2 2c2 2a3 2a8 2a6 2a8 2a5 2c3 2c2 2a3 2b3 2b2 2a8 2a5 2a1 2a1 2b2 2a6 2a5 2a1 2b3 2b3 2b2 2b2 2a6 2a1 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 6 10 8 4 1 2 3 5 7 9 conn_10p v3_3 v3_3 ds33m30 hvdd_3.3v rvdd_1.8v tvdd_1.8v tdp tdn rdn tvss rhvss rdp los v3_3 v1_8 v3_3 sfp_host cgnd cgnd cgnd cgnd cgnd cgnd cgnd cgnd cgnd cgnd cgnd veer rd- rd+ vcct vccr veer td+ veet veet td- veer veer los rate mod-def1 mod-def0 mod-def2 tx_disable tx_fault veet v3_3 v3_3 downloaded from: http:///
6 7 54 3 1 20 30 30 30 7 65 4 30 3 2 1 0 eth_rxd<7..0> gtxclk gmii_tx_er_ eth_tx_en eth_rx_err eth_rxdv eth_rx_clk dut_lan_clk eth_mdio eth_mdc eth_txd<7..0> rb12 rp04 rpb12 u03 rp05 3/8(block) 3/14(total) 03/10/2008 steve scully DS33M30DK02a0 ethernet. p.3-4,12,13-15 cr-3 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page3 block name: _rc_top_dn_. 4 8 7 65 2 1 3 4 8 7 65 2 1 3 m8 l9 l6 l10 l8 m9 l7 m7 m10 m6 l5 m2 m5 e2 g9 k1 j1 l4 j3 m4 k3 l3 m3 l2 k2 4 8 7 65 2 1 3 4d3 4c3 4d4 4a2 4c3 4a2 4c3 4c3 4c4 4d4 4d3 4a5 4b4 4b4 4c3 4c4 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 ds33m30 txd[0] txd[1] txd[2] txd[3] txd[4] txd[5] txd[6] txd[7] txen txerr mdc mdio gtxclk lanclki rxd[0] rxd[1] rxd[2] rxd[3] rxd[4] rxd[5] rxd[6] rxd[7] rxclk rxdv rxerr downloaded from: http:///
is intended for use as testpoints not connection to a resource card ethernet connector (i.m. bus) eth_ref_clk is only used in rmii mode (50 mhz) 2.2k 77.76mhz_3.3v_socket 30 jmp_3 30 30 30 jmp_3 19.44mhz_3.3v_socket 25.000mhz_3.3v_socket gtxclk gmii_tx_er_ clk_to_mac eth_rxd<3..0> eth_txd<3..0> eth_rxd<7..0> eth_txd<7..0> clk_to_mac eth_txd<7..4> eth_rxd<7..4> clk_to_mac gtxclk eth_col_det eth_rx_err phy_int eth_rxdv eth_rx_clk eth_rx_crs eth_tx_clk eth_tx_en gmii_tx_er_ reset_sys eth_mdio eth_mdc py25mhzosc av_lan_clk dut_cladclk dut_lan_clk av_lan_clk py25mhzosc refc_25m rb05 yb03 rb02 jp02 rb14 rb13 rb04 jp07 yb01 yb02 4/14(total) steve scully 4/8(block) 03/10/2008 DS33M30DK02a0 ethernet. p.3-4,12,13-15 cr-4 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page4 block name: _rc_top_dn_. 1 3 2 1 8 4 5 1 8 4 5 1 8 4 5 1 3 2 13b7v 12b5v 3a4 4c3 13a7v 12b5v 4c3 3c6 13b1v 12b5v 4c3 4a7 13b7v 12c5v 4d4 3b2 13b7v 12c5v 3b6 4c4 13b7v 13a7v 12c5v 12b5v 4d3 4c3 3b2 13b7v 12c5v 12b5v 4c3 3b6 13b1v 12b5v 4b1 4c3 13b7v 12b5v 3b6 4c4 13a7v 12b5v 4d4 3b2 13b1v 12b5v 4b1 4a7 13b7v 12b5v 4a2 3a4 13a1v 12c5v 12b5v 13a1v 12c5v 3c3 13a1v 13a7v 12b5v 4a2 3c6 1c4 3a4 12b5v 4b4 13b4v 12b5v 4b4 3c3 13a1v 12c5v page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 _phy_dp83865bvh_dn only gmii lan_clk phyosc25m mdc mdio reset_b tx_er_ tx_en tx_clk rx_crs rx_clk rxdv txd<7..0> rxd<7..0> phy_int rx_err col_det spare<4..1> gmii_clkfrom_mac clktomac clktomac_testpnt vcc 1 osc gnd out v3_3 i.m. card plug-connectors ethernet (lan) connectors _phy_imbus_mb_dn used on bottom of motherboard for connection to ethernet card single 50 pin lan_clk pt2_rxd<3..0> pt2_rxdv pt2_rx_crs pt2_rx_err pt2_txd<3..0> pt2_tx_clk reset_b gmii_clkfrom_mac spare gmii_clktomac_buf gmii_tx_er_ pt1_rxd<3..0> pt1_col_det pt1_rx_clk pt1_rxdv pt1_rx_crs pt1_rx_err pt1_txd<3..0> pt1_tx_clk pt1_tx_en pt2_col_det pt2_rx_clk pt2_tx_en mdio phy_int mdc osc25m vcc 1 osc gnd out vcc 1 osc gnd out v3_3 v3_3 v3_3 downloaded from: http:///
for ddr 15 14 13 12 11 10 98 7 65 4 3 2 1 0 12 11 10 98 7 65 4 3 2 1 0 4.7uf 4.7uf .01uf .01uf 1.00k 1.00k 15 13 14 12 11 10 98 7 64 5 3 2 1 0 0 1 2 3 45 6 7 89 10 11 12 .01uf 4.7uf 4.7uf 4.7uf .1uf .1uf .1uf .1uf 4.7uf 4.7uf .1uf ddr_vref ddr_a<12..0> ddr_dq<15..0> ddr_dq<15..0> ddr_a<12..0> ddr_udqs ddr_ldqs ddr_udm ddr_ldm ddr_ckinv ddr_cs ddr_ck ddr_cke ddr_we ddr_ras ddr_cas ddr_ba1 ddr_ba0 ddr_udm ddr_ldm ddr_vref ddr_cs ddr_ck ddr_cke ddr_ckinv ddr_we ddr_ras ddr_cas ddr_ba1 ddr_ba0 ddr_udqs ddr_ldqs cb43 cb46 cb40 c10 rb09 rb11 u04 cb30 u03 cb72 cb25 cb63 cb56 cb57 cb16 cb60 cb31 cb86 cb44 ddr_vref 5/8(block) 5/14(total) ddr memory. p.5 03/10/2008 DS33M30DK02a0 steve scully cr-5 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page5 block name: _rc_top_dn_. 51 65 16 60 63 62 57 59 56 54 13 10 8 11 5 7 42 29 49 61 3 9 15 55 33 1 18 66 34 48 52 12 64 58 6 17 25 43 53 14 50 19 47 20 46 24 45 44 21 23 22 27 26 38 37 36 35 32 31 30 42 41 28 40 39 b6 d6 b12 f6 g6 g8 f3 e10 b11 d3 d10 g4 f7 a8 c7 a7 e6 e7 d7 b7 e8 d8 b8 f8 c8 a9 b9 c9 a11 a10 c10 b10 e9 d9 a6 c6 a2 a3 a4 b4 c4 a5 b5 c5 f5 e5 d5 f4 e4 d4 b3 c3 c11 a12 b2 c12 g5 g7 f9 e3 5d6 5d5 5c8 5d6 5d2 5c4 5a1 5a4 5c5 5c5 5a8 5b8 5b8 5b8 5b8 5b8 5b8 5b8 5b8 5b8 5b8 5c3 5c3 5d5 5d2 5c3 5c3 5c3 5c3 5c3 5c3 5c3 5c3 5b3 5c1 5c1 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v2_5 ds33m30 vssq vssq vssq vssq avss vssq vssq vssq sddq[1] sddq[0] sddq[2] sddq[3] sddq[4] sddq[5] sddq[6] sddq[7] sddq[8] sddq[9] sddq[10] sddq[11] sddq[12] sddq[13] sddq[14] sddq[15] sdldqs sdudqs sda[0] sda[1] sda[2] sda[3] sda[4] sda[5] sda[6] sda[7] sda[8] sda[9] sda[10] sda[11] sdba[0] sdba[1] sda[12] sdcas* sdras* sdwe* sdclkn sdclken sdclkp sdcs* vddq_2.5v vddq_2.5v vddq_2.5v vddq_2.5v vddp_2.5v vddp_2.5v vddq_2.5v vddq_2.5v vref avdd_1.8v sdldm sdudm mt46v16m16bg75 a8 a9 a10/ap a11 a12 a1 a2 a3 a4 a5 a6 a7 ba0 ba1 cas ras we cke ck cs ck_inv ldm udm dnu dnu nc nc nc nc nc vssq vssq vssq vssq vssq vss vss vss vdd vdd vdd vddq vddq vddq vddq vddq vref a0 dq0 dq1 dq3 dq2 dq6 dq4 dq5 dq7 dq8 dq9 dq11 dq10 dq13 dq14 dq12 ldqs dq15 udqs v2_5 v1_8 v2_5 v2_5 downloaded from: http:///
10k 330 10k d0_spi_miso d1_spi_mosi d2_spi_clk spi_mosi spi_miso m30_int dut_hiz_n dut_jtrst_n dut_jtclk dut_jtms dut_jtdi dut_jtdo 1k dut_jtrst_n dut_jtclk dut_jtms dut_jtdi rpb18 jp15 rpb20 ds10 rb17 j05 j06 d7_spi_cpol m30_cs d5_spi_swap d6_spi_cpha spi_sck spi_ss rpb19 1k bias+config. p.6 6/8(block) DS33M30DK02a0 steve scully 03/10/2008 6/14(total) cr-6 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page6 block name: _rc_top_dn_. 1 3 9 5 7 4 26 10 8 4 8 7 65 2 1 3 rpb17 4 8 7 65 2 1 3 24 8 6 3 1 9 11 13 10 5 7 14 12 4 8 7 65 2 1 3 1 3 2 4 8 7 65 2 1 3 1c1 1c1 1b1 1b5 1a5 1b8 1b1 1b1 6a8 1b4 6a8 1b4 6a8 1b4 6a8 1b4 1b4 1b4 6a5 1b4 6a7 1b4 6a7 1b4 6a7 1c1 1a5 1b5 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 v3_3 2 3 7 13 8 59 11 6 4 10 12 14 1 conn_14p v3_3 conn_10p 5 3 1 7 tms tck tdi tdo vcc gnd downloaded from: http:///
trace geometry for this is: 1 inch long, 10 mil wide, 1 oz coppe r traces between regulator output and v2.5 should to ensure load sharing between the 2.5v 1% regulators be long enough to build 0.05 ohm of resistance 4.7uf .1uf 4.7uf .1uf .1uf 4.7uf 10uf .01uf .1uf .1uf 4.7uf 4.7uf 10uf 10uf .1uf .1uf 4.7uf 10uf 3.08v 330 green .1uf 10uf .01uf 4.7uf 4.7uf 10uf 4.7uf .1uf .1uf .1uf 330 green 4.7uf 470uf .1uf 4.7uf 470uf 2.5v .1uf 4.7uf 470uf 4.7uf 4.7uf 470uf 1.8v reset_sys v2_5 v1_8 cb35 cb52 cb83 cb34 cb82 cb67 cb41 cb85 cb26 cb54 cb64 cb38 cb28 cb87 cb69 cb59 cb84 cb27 sw01 ub03 rb20 ds12 cb37 cb29 cb107 cb81 cb70 cb23 cb116 cb06 cb58 rb22 ds14 c04 cb13 ub06 c01 c02 cb03 ub01 cb97 cb110 cb02 cb05 cb07 cb01 ub02 cb17 .1uf cb36 buffer DS33M30DK02a0 7/14(total) 03/10/2008 7/8(block) power. p.7-8 steve scully cr-7 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page7 block name: _rc_top_dn_. 4 3 1 2 3 1 42 1 2 1 2 2 1 4 1 2 1 15 6 7 13 5 4 2 17 10 11 14 12 3 2 1 2 1 15 6 7 13 5 4 2 17 10 11 14 12 3 4b4 1b1 1a8 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 v3_3 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 v1_8 nc7sz86_u v2_5 v3_3 v3_3 max811_u reset* vcc gnd mr* v3_3 v1_8 v2_5 v2_5 downloaded from: http:///
3.3v 1% regulator c16 rpb24 330 gnd_tp02 c14 ub05 cb100 h03 cb111 r01 r03 cb94 cb95 ds13 r04 c18 cb99 h02 ub07 cb119 cb118 c13 jb02 cb98 cb109 cb108 cb114 cb121 cb115 cb91 cb106 cb103 cb92 cb93 cb105 cb102 cb96 cb120 c15 c17 db01 powerok powerok 10uf 68uf 10uf 470uf 0.0 0.0 4.7uf 4.7uf red_green 0.0 10uf 68uf 3.3v 68uf 68uf 10uf 10uf 4.7uf .1uf .1uf 4.7uf .1uf .1uf 10uf 4.7uf .1uf .1uf 4.7uf .1uf .1uf 10uf 10uf 10uf 1 amp 10uf 100o100mzhpbf ub04 3.3v 3.3v h01 .50standoff__nut h05 h04 h08 gnd_tp05 gnd_tp04 gnd_tp06 gnd_tp01 gnd_tpb03 gnd_tp03 gnd_tpb02 gnd_tpb01 cr-8 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page8 8/8(block) 8/14(total) 03/10/2008 steve scully DS33M30DK02a0 power. p.7-8 block name: _rc_top_dn_. l1 2 1 2 1 2 1 c1 15 6 7 13 5 4 2 17 10 11 14 12 3 1 1 1 2 1 3 2 1 4 2 1 2 1 4 8 7 65 2 1 3 1 1 1 2 1 15 6 7 13 5 4 2 17 10 11 14 12 3 15 6 7 13 5 4 2 17 10 11 14 12 3 8a8 8a4 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v5_0 v5_0 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 4 4 4 v3_3 green red 4 1 2 3 v5_0 4 4 4 max1793_u in2 out1 out3 set gnd gnd in1 in3 in4 out2 shdn rst out4 v5_0 v3_3 downloaded from: http:///
beginning of processor hierarchy block cr-9 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page1_i10@\_rc_lib\ .\_motprocrescard_dn\(sch_1):page1 printed mon mar 10 14:11:38 2008 block name: _motprocrescard_dn. parent block: \_rc_top_d n_\ 9/14(total) steve scully 03/10/2008 1/3(block) DS33M30DK02a0 1b6^ 10d4 1b6^ 10c4 1a6^ jp13 jp14 ds08 rb03 rpb21 rb19 cb104 u05 u05 1 cb101 pd<31..0> jmp_3 xtal enable_callbacks_h enable_driver_h procser_out procser_in 1 16 17 reset_in cs0 0.0 vddsyn flash_vpp 31 10 4 cpuclk_out proc_reset_out once_de_b 27 26 pqb0 pqb2 pqb3 int2 1uf tc2 ta rcon oe vrh tea rw sci2_out icoc10 test icoc13 icoc12 icoc11 icoc21 icoc20 icoc23 icoc22 pqa4 pqa3 pqa0 pqa1 cs3 tc1 once_tdi 2107_tdo cse1 eb3 pqb1 eb1 eb2 cse0 cs2 yco sci2_in 25 20 22 13 12 11 10 8 9 7 65 3 21 4 1 0 .1uf 20 0 2 3 5 30 29 19 28 24 23 6 7 8 9 21 18 19 17 18 16 13 12 11 15 14 gnd pa<22..0> 2 22 15 14 eb0 cs1 spi_cs tim_16h_8l 10k 330 int2 int2 jmp_3 enable_driver_h cs_spi_flash user_led2 enable_callbacks_h run_kit_usr kit_status once_tms once_trst_b once_tclk osc_mcu spi_mosi spi_miso spi_sck 45 9 19 17 20 21 22 25 27 30 31 34 35 16 15 12 10 7 5 4 3 2 1 36 37 38 39 40 41 42 43 46 48 51 114 73 126 140 127 76 64 44 32 18 8 50 49 47 29 28 26 24 23 13 11 6 139 137 136 134 132 131 122 121 119 117 116 144 14 112 59 65 33 123 141 129 77 87 115 74 103 102 92 113 95 97 99 4 8 7 65 2 1 3 1 2 1 3 2 1 3 2 69 68 82 84 75 79 124 91 90 80 71 138 86 118 128 120 93 143 83 85 62 67 98 100 101 104 105 106 88 96 60 135 133 78 81 110 111 109 108 107 94 142 130 125 53 52 55 54 58 57 56 72 63 61 66 89 70 10a2 10a6 10c7 10d7 11d6 9a7 9a7 10d1 11d5 1a7^ 10b3 10b7 11d3 11d4 9a7 9a6 10d2 1b7^ 10c7 10b4 10b7 11d5 11d5 10b4 10b7 9a7 10d2 1b7^ 9a7 9a6 10d2 1b7^ 9a6 10c4 9a6 11c8 11d3 11d4 11d5 11d6 mmc2107 control rxd1 int7* txd2 icoc10 test int1* icoc13 icoc12 icoc11 icoc21 icoc20 icoc23 icoc22 extal tclk trst* ss* pqb0 pqa4 pqa3 pqa0 pqa1 cs3* tc1 tdi tdo cse1 eb3* int6* pqb1 pqb2 pqb3 eb0* eb1* eb2* tc2 cse0 cs1* cs2* de* sck rstout* clkout reset* cs0* tms int0* yc0 mosi miso xtal int3* int2* int5* int4 rxd2 txd1 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 v3_3 out out in out mmc2107 port ta* shs* oe* vrh vstby tea* vddh vddf vdda vpp vdd6 vdd7 vdd8 vddsyn vdd3 vdd5 rw vrl a8 d31 a22 a21 a20 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a7 a6 a5 a4 a3 a2 a1 a0 vss1 vss2 vss3 vss4 vss5 vss6 vss7 vss8 vsssyn vssf vssa d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d30 d29 d28 d27 d26 d25 d24 d23 d22 d21 d11 d12 d13 d14 d15 d16 d17 d18 d19 d20 vdd2 vdd1 vdd4 v3_3 downloaded from: http:///
reset configuration intern boot xtal w/ pll full drive master mode 9a7 9a6 1b7^ 9b5 11d5 1a7^ 1a7^ rpb22 rpb27 rpb26 ub09 u06 cs_x4 pd<19> pd<18> 10k pd<28> pd<23> pd<22> 10k pd<16> pd<26> pd<17> pd<21> rcon cy62128v pd<23..16> misc_io<12> misc_io<11> misc_io<10> misc_io<9> misc_io<8..1> d_dut<7..0> a_dut_<12..0> rd_dut wr_dut int2 cs_x2 cs_x3 cs_x1 cs_x5 reset_in int3 int5 int4 13 pa<17..1> 16 17 20 19 24 21 25 26 27 28 29 30 31 22 9 10 11 12 13 14 16 8 7 65 4 3 2 1 15 17 oe eb0 cs0 pa<17..1> cy62128v oe eb1 cs0 23 18 pd<31..24> 10 11 12 14 15 16 17 1 2 3 45 6 7 89 10k 3.3v spi_miso spi_sck cs_spi_flash spi_mosi block name: _motprocrescard_dn. parent block: \_rc_top_d n_\ 03/10/2008 steve scully DS33M30DK02a0 10/14(total) 2/3(block) cr-10 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page1_i10@\_r c_lib\.\_motprocrescard_dn\(sch_1):page2 4 8 7 65 2 1 3 4 8 7 65 2 1 3 4 8 7 65 2 1 3 1 2 8 7 3 4 56 u1 21 20 19 18 17 15 14 13 27 26 23 25 4 28 3 31 2 32 16 24 29 1 12 11 10 9 8 7 6 5 30 22 21 20 19 18 17 15 14 13 27 26 23 25 4 28 3 31 2 32 16 24 29 1 12 11 10 9 8 7 6 5 30 22 9a2 10a2 9a2 10a6 9a2 10a2 9a2 10a2 9a2 10a2 9a2 10a6 9a2 10a2 9a2 10a2 9d3 9a2 10c7 10d7 9a1 10a5 9d7 9a1 10a8 10b7 9a2 10c7 10d7 9d7 9d3 9b5 10b7 9b5 1a6^ 9a7 1b6^ 9a7 9a8 1a6^ page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 cy62128v ce1* ce2 a7 a6 a5 a4 a3 a2 a1 a0 n_c we* oe* gnd vcc a16 a15 a14 a13 a12 a11 a10 a9 a8 io0 io1 io2 io3 io4 io5 io6 io7 v3_3 cy62128v ce1* ce2 a7 a6 a5 a4 a3 a2 a1 a0 n_c we* oe* gnd vcc a16 a15 a14 a13 a12 a11 a10 a9 a8 io0 io1 io2 io3 io4 io5 io6 io7 v3_3 at26df081_u 8mbit sck si gnd wp* hold* vcc so cs* io io io io io io out out out in out out out out out out in in in v3_3 downloaded from: http:///
connection as testpoints use rpack dtr and rts on cp2101 chip (unused) output vdd is a place pads for cap but do not populate align key once_de_b 10k kit_status green xtal osc_mcu 8.0mhz 1.0m once_tclk flash_vpp reset_in 2107_tdo once_tdi once_tms 330 once_trst_b con14p 10k 10k .1uf 4.7uf 10k 1uf usb jmp_3 jmp_3 10k usb_din sspl usb_dout sspl usb_dout usb_din uart_digin uart_digout procser_out procser_in uart_digin prt1_out prt1_in prt1_out prt1_in uart_digout j07 ub08 j08 r02 1 2 1 xb01 jb01 rpb29 rpb28 rb18 1 2 1 ds11 rpb23 rpb25 u07 cb117 cb112 cb113 rb21 j09 jp18 jp19 3/3(block) 03/10/2008 steve scully block name: _motprocrescard_dn. parent block: \_rc_top_dn_\ 11/14(total) DS33M30DK02a0 cr-11 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page1_i10@\_r c_lib\.\_motprocrescard_dn\(sch_1):page3 13 9 7 5 11 3 1 10 12 8 6 4 14 2 1 2 2 1 1 2 3 4 5 1 3 2 1 3 2 20 1 8 45 6 7 9 10 11 12 13 14 15 16 17 18 19 3 2 9 5 4 2 1 3 6 7 8 1 2 2 1 4 8 7 65 2 1 3 4 8 7 65 2 1 3 1 2 4 8 7 65 2 1 3 4 8 7 65 2 1 3 8 4 24 28 23 27 1 2 18 19 20 21 22 9 7 17 15 16 14 13 10 3 6 26 25 12 11 5 2 1 2 1 9b5 9a7 9a7 9a6 9a6 9d3 1a7^ 10d1 9b5 9d6 9d6 9a6 9a6 11b5 11b4 11a5 11b2 11b2 11b2 11b8 11b8 9b8 9b8 11a5 11b8 11b8 11a8 11a8 11a5 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 cp2101 usbdm suspend_low* suspend_high rxd txd vdd gnd nc1 nc2 nc3 nc5 nc4 nc6 regin rst* nc11 nc10 nc9 nc8 nc7 ri* dcd* dsr* cts* dtr* rts* usbdp vbus v3_3 v5_0 v3_3 v3_3 conn_db9p h g f c a b de j max3233e invalid* t2in t2out gnd v- c2- c2+ c1- c1+ v+2 v+1 forceoff* vcc t1out r1out forceon t1in r1in r2out r2in v3_3 gnd dat- vdd dat+ usb con14p downloaded from: http:///
connectors for lan motherboard to resource card 0 1 2 3 0 1 0 1 2 3 2 3 1 0 3 2 i78 smt na sfm-125-l2-s-d-lc pt2_rxd<3..0> pt1_rxd<3..0> pt1_rx_crs pt1_rx_err pt1_rxdv pt1_col_det phy_int pt1_rx_clk spare reset_b pt1_txd<3..0> osc25m lan_clk pt1_tx_en gmii_clkfrom_mac gmii_clktomac_buf gmii_tx_er_ pt1_tx_clk pt2_rxdv pt2_col_det pt2_rx_crs pt2_rx_err pt2_rx_clk pt2_txd<3..0> mdio pt2_tx_en pt2_tx_clk mdc gmii_clktomac_buf spare gmii_clkfrom_mac i68 i67 pt1_rx_crs pt1_rx_err pt1_col_det pt1_rx_clk pt1_tx_clk pt1_tx_en pt1_txd<3..0> pt1_rxdv pt2_rxdv pt2_rxd<3..0> pt2_rx_crs pt2_rx_err pt2_col_det pt2_rx_clk pt2_tx_clk pt2_tx_en pt2_txd<3..0> pt1_rxd<3..0> gmii_tx_er_ phy_int gnd v3_3 mdio mdc reset_b lan_clk j04 4b3^ 4b1^ 12b6 12b4 4b1^ 12b6 4b1^ 12b6 12/14(total) block name: _phy_imbus_mb_dn. parent block: \_rc_top_dn_ \ DS33M30DK02a0 steve scully 03/10/2008 1/1(block) printed mon mar 10 14:11:39 2008 cr-12 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page4_i3@\_rc_lib\. \_phy_imbus_mb_dn\(sch_1):page1 39 7 5 11 17 15 23 25 27 31 33 35 37 41 43 45 47 49 16 18 26 28 30 32 34 36 38 40 44 46 48 50 29 24 20 42 14 10 3 22 21 13 4 19 2 1 8 6 12 9 4c3^ 12b1 4d3^ 12c1 4d3^ 12d1 4c3^ 12d1 4d3^ 12c1 4d3^ 12d1 4b3^ 12a8 4d3^ 12d1 12a7 4b3^ 12a8 4c3^ 12d1 4b3^ 12a8 4c3^ 12d1 4b1^ 12a4 4b1^ 12a4 4b1^ 12a4 4c3^ 12d1 12c1 12c1 12c1 12c1 12c1 4c3^ 12c1 4b3^ 12a8 12c1 12c1 4b3^ 12a8 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v2_5 io v3_3 v1_8 io 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 24 23 22 21 17 11 7 4 25 26 20 19 9 1 8 16 12 10 2 14 3 6 5 18 15 13 io io io io io io v3_3 io io io io io io io io io io io io io io io io io io io io downloaded from: http:///
txen pin62 rxdv pin44 txerr pin61 rxd[0:7] [pin56:pin45] place 9.76k res close to bg_ref txd[0:7] [pin76:pin65] output rxclk pin57 col pin39 crs pin40 rxer pin41 txclk pin60 mdc pin81 input clkout pin87 clktomac pin85 gtxclk pin79 clkin pin86 place mdi resistors stipline to v2_5phy maintain 50ohm close to phy clkout tx_clk rx_clk clktomac_testpnt mdia_p mdib_n mdib_p rx_clk_buf phy_int 1k tx_er_ 1k 30 30 30 col_det rx_crs 30 clktomac clkout_buf 30 30 rx_clk_buf col_det_buf 2 txd<7..0> 4 mdix_en_strap mac_clk_en_strap__tx_syn_clk mdc mdio rxdv_buf rx_err_buf tx_er_ gmii_clkfrom_mac tx_en tx_clk_buf rx_crs_buf reset_b bg_ref clktomac_testpnt phyosc25m green tx_er_ gmii_clkfrom_mac mdc reset_b mdio phy_int spare<4..1> col_det rxd<7..0> tx_clk rx_clk tx_en rx_crs 0 1 a0_duplex 3 56 7 0 1 2 3 45 6 7 rxd<7..0> gnd v3_3 2.0k 330 2.0k 9.76k txd<7..0> clktomac multi_en_strap__tx_trigger 0603_2pct_50 lan_clk u02 rp02 rp06 rp03 rp07 rb15 ds04 rb07 rb01 rp01 rb06 tp01 rpb11 mdic_n mdid_p activityled_speed0 rxdv rp08 mdic_p rpb09 mdid_n mdia_n rpb10 clktomac_buf rx_err tx_clk_buf phyosc25m rx_err rxdv non_ieee_strap clktomac_buf clkout_buf 0603_2pct_50 man_mdix_strap__tx_tclk rpb08 a0_duplex link1000led_anen link100led_duplex link10led_speed1 col_det_buf rxdv_buf rx_err_buf rx_crs_buf 13b1 4b4^ 13b3 4c4^ 13b7 13a7 4c4^ 13b7 4b4^ 13c3 4b4^ 14b5 13d6 4b4^ 14b5 13c3 4b4^ 14b5 13c3 4d4^ 13b1 4d4^ 13a8 4c4^ 13b1 4d4^ 13b1 4c4^ 13b7 4d4^ 13a1 4c4^ 13b7 4c4^ 13b1 4b4^ 4d4^ 13a1 4c4^ 13a1 printed mon mar 10 14:37:14 2008 DS33M30DK02a0 steve scully 03/10/2008 1/2(block) . schematic on 13/14(total) block name: _phy_dp83865bvh_dn. parent block: \_rc_top_d n_\ cr-13 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page4_i7@\_rc_lib\. \_phy_dp83865bvh_dn\(sch_1):page1 92 90 96 123 98 100 34 102 33 32 31 28 24 27 39 40 60 75 76 71 72 68 67 66 65 62 79 61 57 55 52 56 51 50 47 46 45 41 44 87 114 120 121 126 127 86 80 81 109 3 108 115 85 18 17 88 95 1 7 13 14 89 10 9 8 6 94 128 4 8 7 65 2 1 3 8 7 65 2 3 4 1 8 7 65 2 3 4 1 4 8 7 65 2 1 3 4 8 7 65 2 1 3 4 8 7 65 2 1 3 4 8 7 65 2 1 3 4 8 7 65 2 1 3 1 2 4 8 7 65 2 1 3 4 8 7 65 2 1 3 4c4^ 13c1 4d4^ 13c1 14c3 14c3 14c3 13b7 4c4^ 13b7 13c1 4d4^ 13c1 4d4^ 13c1 4c4^ 13c1 13b3 13b2 13b2 4c4^ 13c1 14c4 14c4 4b4^ 13d2 4b4^ 14b5 13d2 13a2 13a2 4c4^ 13a7 13c1 4c4^ 13d1 4c4^ 13c1 13b2 13a2 4b4^ 14b5 13d2 13a3 4d4^ 13b1 14c4 14b3 14b3 14b6 14c3 14b3 14c3 13b3 4c4^ 13c1 13c7 4d4^ 13c1 14d4 13b2 13b2 14d4 13a4 14b6 14b6 14b6 13c7 13a7 13a7 13c7 page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 v3_3 io io io v3_3 io io io io io io io io io io io io in v2_5 v1_8 v2_5 v1_8 v3_3 io io io io dp83865_u vss<1..35> multi_en_strap/tx_trigger man_mdix_strap/tx_tclk link10_led/speed1_strap link100_led/duplex_strap link1000_led/an_en_strap mdix_en_strap phyaddr<1>_strap duplex_led/phyaddr<0>_strap activity_led/speed0_strap non_ieee_strap phyaddr<4>_strap mac_clk_en_strap/tx_syn_clk phyaddr<2>_strap phyaddr<3>_strap clk_to_mac mdib_n mdia_p interrupt* mdia_n mdc mdio clk_in mdid_n mdid_p mdic_n mdic_p mdib_p clk_out rx_dv/rck rx_er/rxdv_er rxd<7> rxd<6> rxd<5> rxd<4> rxd<3>/rx3 rxd<0>/rx0 rxd<2>/rx2 rxd<1>/rx1 rx_clk tx_er gtx_clk/tck tx_en/txen_er txd<7> txd<6> txd<5> txd<4> txd<2>/tx2 txd<3>/tx3 txd<0>/tx0 txd<1>/tx1 tx_clk/rgmii_sel0 crs/rgmii_sel1 col tms tck tdo tdi trst* reset* bg_ref vdd_sel_strap 1v8_avdd3 1v8_avdd2 1v8_avdd1_<1..5> 2v5_avdd<1..2> io_vdd<1..12> core_vdd<1..8> downloaded from: http:///
strap options here do not follow datasheet check that 2.2k res use the same rpack caps for decouple of mx.+- cb89 c06 .01uf activityled_speed0 link10led_speed1 link100led_duplex link1000led_anen ds05 ds09 ds06 j03 rpb05 rpb05 rpb05 rpb05 cb78 cb42 jp04 jp05 cb65 cb09 cb10 cb08 green_green jmp_3 jmp_3 jmp_3 .01uf .01uf .01uf .01uf 4.7uf 4.7uf mdic_n mdic_p mdia_p mdid_n mdib_n mdib_p l1000ob l10ob green_green green_green 2.2k lactob mdia_n 2.2k green_green jp03 2.2k ds07 rpb07 2.2k 330 jp06 jmp_3 l100ob mdid_p rb16 2.0k rpb14 2.2k jp09 jp08 non_ieee_strap rpb06 2.2k phy_int mdio reset_b .01uf c12 c08 .1uf c05 .1uf c03 .1uf c09 .1uf .1uf cb74 .1uf cb12 4.7uf cb55 4.7uf cb77 4.7uf cb49 4.7uf cb73 4.7uf cb53 4.7uf c07 4.7uf cb62 .01uf cb14 .1uf cb48 .1uf cb71 .1uf cb75 .1uf c11 .1uf cb66 .1uf cb24 .1uf cb20 .1uf cb45 .1uf cb11 4.7uf cb47 4.7uf cb50 4.7uf cb76 4.7uf cb68 4.7uf cb51 4.7uf 4.7uf cb61 4.7uf cb90 .01uf cb04 .1uf cb39 .1uf cb88 4.7uf cb79 4.7uf cb80 4.7uf cb32 4.7uf cb33 mac_clk_en_strap__tx_syn_clk mdix_en_strap multi_en_strap__tx_trigger man_mdix_strap__tx_tclk cr-14 : @\_rc_lib\.\_rc_top_dn_\(sch_1):page4_i7@\_rc _lib\.\_phy_dp83865bvh_dn\(sch_1):page2 DS33M30DK02a0 steve scully 03/10/2008 2/2(block) 14/14(total) block name: _phy_dp83865bvh_dn. parent block: \_rc_top_d n_\ 1 2 4 3 1 2 4 3 1 2 4 3 1 2 4 3 1 3 2 1 3 2 1 3 2 1 3 2 1 3 2 4 8 7 65 2 1 3 4 8 7 65 2 1 3 4 8 7 65 2 1 3 1 8 2 7 3 4 5 5 10 8 7 12 11 4 6 2 3 1 9 13b3 13b3 13b3 13b3 13b3 13c3 13c3 13b3 13c3 13c3 13c3 13b3 13b3 13b3 13a3 13a3 13a3 13c3 13d2 4b4^ 13c3 13d2 4b4^ 13d2 13d6 4b4^ page: date: title: engineer: a a b b c c d d 1 1 2 2 3 3 4 4 5 5 6 6 7 7 88 1000pf, 2kv mx3- mx3+ j8 j7 mx2- j5 j4 j6 j1 j2 mx0- mx0+ mx2+ j3 mx1- mx1+ 750 x4 cmr chokes 0.01 uf x4 conn_hfj11_1g02e_u vcc td0+ td1+ td0- td1- td2+ sh1 sh2 td3+ td3- gnd td2- v2_5 v2_5 v3_3 v3_3 v3_3 v3_3 v3_3 v3_3 v2_5 v1_8 v3_3 3 4 2 1 3 4 2 1 3 4 2 1 3 4 2 1 downloaded from: http:///

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